System i servers work with a different
structure when compared to the previous technologies used with AS/400 and iSeries
servers.
Above the POWER5 technology-based hardware is a code layer called the
POWER Hypervisor.
This code is part of the firmware shipped with the System i
hardware.
The POWER Hypervisor resides in flash memory on the Service
Processor.
This firmware performs the initialization and configuration of the
System i hardware, as well as the virtualization
support required to run up to
254 partitions concurrently on the System i servers.
Partition Licensed
Internal Code (PLIC) allows for management of multiple partitions of the System
i hardware.
It is included as part of the POWER Hypervisor.
The layers above the POWER Hypervisor are
different for each supported operating system.
The layers of code supporting
Linux and AIX 5L consist of System Firmware and Run-Time Abstraction
Services
(RTAS).
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